AI ASICs Hiring Signals — May 2026

Volume & Trend

• Total open roles (last 90d): **30** (vs previous 90d: **0** — `delta_pct` is null because the prior window had no tracked roles; treat this as a net-new tracking cohort, not a growth spike).
• Distribution by level: **100% unspecified** (30/30 roles carry no published seniority band) — the entire cohort hides level, which is itself the signal (see Reverse-Hype).

Top 5 Specialties (last 90d)

1. **physical design**: 6 jobs at 6 companies
2. **RTL design**: 5 jobs at 5 companies
3. **place and route**: 5 jobs at 5 companies
4. **timing closure**: 5 jobs at 5 companies
5. **design verification**: 3 jobs at 3 companies

Read together, physical design + place and route + timing closure = **16 of 30 tracked roles** are back-end physical implementation. This is not a research-stage hiring pattern; it is a tapeout-stage one — companies staffing P&R and timing closure are converging RTL onto a process node, not exploring architecture.

Top 5 Hiring Companies (last 90d)

| Company | New Roles | Top Specialty | Avg Level | |---------|-----------|---------------|-----------| | AMD | 0 | n/a | unspecified | | Groq | 0 | n/a | unspecified | | Cerebras Systems | 0 | n/a | unspecified | | Tenstorrent | 0 | n/a | unspecified | | SambaNova Systems | 0 | n/a | unspecified |

Note: `new_roles` is 0 for every company because this is the first tracked 90d window (prev cohort = 0); company-level deltas are not yet computable. Company-specific reads below are derived from the JD raw_text sample, explicitly labeled as such, and not from `top_companies` stats.

Business-Talent Correlation Insights (3 most striking)

`correlation_links` is **empty** in this input. No business-signal-to-talent-signal pairs were provided, so no confidence-scored correlations can be ranked or asserted. To stay inside the numeric constraint, this section reports nothing fabricated. The forward-looking value of this cycle lives entirely in JD-leaked roadmap language, surfaced in the Leading-Indicator section below and flagged as JD-sample-derived (not stat-confirmed).

Hiring as Leading Indicator

No `correlation_links` exist to confirm a talent-before-public-signal pattern statistically. However, the JD raw_text sample leaks unannounced roadmap content; each company below is staffing back-end implementation against a product that is named only as "next-generation":

• **AMD**: 5 sample roles spanning RTL, physical design, DV, plus a Principal *Chiplet and Advanced Packaging* role citing UCIe/HBM and 2.5D/3D for "future Instinct accelerator and CDNA-based products." A principal-level chiplet-partitioning hire before any public next-gen Instinct die disclosure → expect a CDNA-class multi-die Instinct reveal around **Q4 2026**.
• **Groq**: 5 sample roles incl. "next-generation LPU" RTL (spec-to-tapeout) and a Principal *Inference Systems* architect defining rack-scale scale-out. Tapeout-stage LPU staffing with no public next-gen LPU silicon yet → expect a next-gen LPU / rack-scale platform announcement around **Q3 2026**.
• **Cerebras Systems**: physical design + DV roles explicitly for the "next-generation wafer-scale engine" plus a Principal package/SI-PI hire. Full-chip PD + signoff staffing before a public next-gen WSE → expect a successor wafer-scale engine announcement around **Q4 2026**.
• **Tenstorrent**: PD role for "Blackhole-class" SoCs and Tensix-core RTL plus a DFT role for advanced-node tapeouts. DFT-on-advanced-node staffing typically lands 2–3 quarters before silicon → expect a Blackhole-successor / next Tensix product disclosure around **Q1 2027**.

Reverse-Hype Warnings

**Over-marketing detected:** Notably, the classic JD inflation vocabulary — "rockstar," "world-class," "ninja," "moonshot" — is **absent** across all 20 sampled JDs. These are sober, signoff-driven postings ("coverage closure ahead of tapeout," "STA signoff on large multi-clock designs," "spec to tapeout"). The single inflated tell is the relentless repetition of "next-generation" / "next-generation" across AMD, Groq, Cerebras, and Tenstorrent: it appears in nearly every architecture- and PD-level JD as a placeholder for a product the company will not name. "Next-generation" here is the marketing euphemism doing the work "rockstar" usually does — it signals an unannounced part while disclosing nothing checkable.

**Under-reported:** Three things are systematically hidden. First, **level**: 30/30 roles are `unspecified` — no seniority or comp band is published anywhere, despite JDs demanding 8–10+ years and "Principal"/"Staff" titles, so the real seniority skew (heavily senior/principal) is invisible in the stats. Second, **specialty coverage**: the JD sample contains DFT (scan/MBIST/boundary scan), advanced packaging / signal-and-power integrity, and ML-compiler roles (MLIR, graph lowering, tensor scheduling) that do **not** appear in the top-5 specialties — meaning hardware-software co-design and test/packaging demand is materially under-counted by the specialty taxonomy. Third, **timeline specifics**: process node, tapeout date, and product name are omitted from every posting, so the leading-indicator reads above are necessarily inferential rather than dated.