InfiniBand vs Ethernet-AI Fabric Market Analysis — May 2026

Market Size & Growth

• Current market size (USD): No first-party market-size signal was supplied. Bottom-up proxy ≈ $20–30B/yr of AI-training fabric spend, derived from Meta's 2025 capex envelope of $66–72B (signal 66bf1b34-bc54-45a3-8d47-7d539ebb8c9f; cccf9b83-f2c2-4abe-8426-b31270423569), of which interconnect is conventionally 10–15%, plus HPE's $14B Juniper acquisition repricing the Ethernet-AI franchise (signal f6ede771-388d-4038-be04-7f99af498620).
• 3-year CAGR: ~35% proxy. Per-generation fabric bandwidth is doubling roughly every 18 months — CN5000 400Gbps → CN6000 800Gbps (2026) → CN7000 ~1.6Tbps (signals 73119780-56a6-4ae8-85ca-7dbda6fc2472; 0fece89c-e845-4d87-b44c-59d964f0fd45) — and Meta guides 2026 capex dollar growth "notably larger" than the already-raised 2025 number (signal 66bf1b34-bc54-45a3-8d47-7d539ebb8c9f).
• Key drivers:
• Hyperscaler capex re-acceleration tied explicitly to "networking fabric expansion" (signals 66bf1b34-bc54-45a3-8d47-7d539ebb8c9f; cccf9b83-f2c2-4abe-8426-b31270423569)
• Standardization lowering buyer lock-in risk: UEC 1.0, June 2025 (signals c3ea56a7-658f-4096-aa03-8afd0187b7d7; c3c6447a-2983-43b2-98d0-17fb9e5629cc)
• Multi-GW cluster buildouts demanding 500k–1M endpoint fabrics (signals b2fb752d-9f4e-4041-9e07-0cb77130a2e5; c3ea56a7-658f-4096-aa03-8afd0187b7d7)

Supply Chain

• Upstream: SerDes IP / 224G PAM4 (Enfabrica stack hiring, signal 883211e5-a518-4a6c-9a5b-49da2838ca74), switch & NIC ASIC fabrication (Intel 18A ramp, signal 9379d008-6c70-43ea-b04d-6fe1e6042453), co-packaged optical I/O light sources (Ayar TeraPHY/SuperNova, signal 2e6de52c-2cfb-4599-87a1-95d36a2d0f8a), UEC spec governance (signal c3ea56a7-658f-4096-aa03-8afd0187b7d7).
• Downstream: hyperscaler training clusters (Meta Prometheus/Hyperion, signal b2fb752d-9f4e-4041-9e07-0cb77130a2e5), DOE/national labs (Cornelis base), neocloud GPU capacity (Meta–CoreWeave $14.2B, signal 02f51ab8-f79c-4912-9a09-2e0ad4f5b736).

[SerDes / optics / ASIC fab] → [fabric NIC+switch vendors] → [hyperscaler & national-lab AI clusters]

Trend Lines (ranked by importance)

1. Proprietary-fabric capitulation to Ultra Ethernet

• Evidence: "signaling a pivot from proprietary Omni-Path toward Ethernet-AI for hyperscale AI training fabrics" (signal 73119780-56a6-4ae8-85ca-7dbda6fc2472)
• Why now: UEC 1.0 shipped June 2025 with standardized 800Gbps transport, hardware adaptive routing, in-network collectives and ~1M-endpoint scaling (signal c3ea56a7-658f-4096-aa03-8afd0187b7d7) — the first open Ethernet spec to credibly match InfiniBand's feature set, a specific 2025 standards event, not "AI got better."
• Implication: through H1 2027 differentiation migrates off the wire into congestion-control firmware and SuperNIC silicon; vendors without a UEC roadmap (Intel's wound-down Tofino, signal b97c209c-c954-480d-8e4c-82f499adc161) lose the spec-conformance entry ticket.

1. NIC-and-switch silicon convergence (the SuperNIC)

• Evidence: "hiring across the full silicon stack — Principal SerDes (112G/224G PAM4) ... within a single Feb–May 2026 window" (signal 883211e5-a518-4a6c-9a5b-49da2838ca74)
• Why now: 224G PAM4 SerDes pre-tapeout activity in early 2026 implies 1.6T-class parts entering bring-up — a concrete SerDes/node shift, not incremental tuning.
• Implication: 18–24 month fabric design-win cycles mean 2026 tapeouts lock 2028 cluster share; pre-revenue challengers must convert funded trials before incumbents' UEC parts ship.

1. The fabric war is splitting into two wars: scale-out (Ethernet) vs scale-up (NVLink/optical)

• Evidence: "co-develop multiple generations of custom data-center and PC products that link Intel x86 CPUs to NVIDIA platforms over the NVLink interconnect" (signal 4bb4975f-ebe7-4dc7-96ba-5b5b15a9e508)
• Why now: NVIDIA's Sept 2025 $5B Intel equity plus NVLink licensing into x86 (signal 4bb4975f-ebe7-4dc7-96ba-5b5b15a9e508) hard-codes NVLink as the scale-up domain at the exact moment UEC settles scale-out.
• Implication: an Ethernet "win" is scale-out-only; co-packaged optics (Ayar, signal 2e6de52c-2cfb-4599-87a1-95d36a2d0f8a) and NVLink own the intra-pod layer Ethernet never addressed — the TAM bifurcates rather than consolidates.

Key Inflection Points (Watch List)

• CN6000 800Gbps UEC-conformant silicon actually shipping in 2026 (signals 73119780-56a6-4ae8-85ca-7dbda6fc2472; 3e9e89c0-a569-4576-ad26-9cb856801db5) — make-or-break proof of the Ethernet pivot.
• Meta "Prometheus" ~1GW RoCE/Ethernet cluster online in 2026 (signal b2fb752d-9f4e-4041-9e07-0cb77130a2e5) — first public multi-GW Ethernet-at-training-scale datapoint.
• Meta "Hyperion" scaling toward 5GW (signal b2fb752d-9f4e-4041-9e07-0cb77130a2e5) — RoCE congestion control validated, or not, beyond the 24,576-GPU scale already shipped (signal 88ae9cf9-df49-4170-9d28-05c55cd8300c).
• Meta's 2026 capex print confirming "notably larger" growth (signal 66bf1b34-bc54-45a3-8d47-7d539ebb8c9f) — the demand-side gating number.
• First production UEC 1.0-conformant parts from any vendor (signal c3c6447a-2983-43b2-98d0-17fb9e5629cc) — the standard turns real.

Reverse-Hype Warnings

The consensus that "Ethernet has won the AI fabric war" is the most overhyped claim in current discourse. UEC 1.0 is a 2025 specification, not 2025 silicon: Cornelis's UEC-aligned CN6000 is not expected until 2026 and is explicitly an unproven-in-production standards bet (signal 3e9e89c0-a569-4576-ad26-9cb856801db5), and no signal claims RoCE parity with InfiniBand at the 5GW scale Meta is targeting — DSF/RoCE congestion tuning at multi-GW is publicly unproven (signal 326da885-befc-46cf-96a0-cff457c946fa). The narrative also conflates two layers: Ethernet's win is scale-out only, while NVIDIA is quietly consolidating the scale-up domain by licensing NVLink into Intel x86 (signal 4bb4975f-ebe7-4dc7-96ba-5b5b15a9e508) — a structural move underrated relative to the noisy UEC headlines. Equally underrated is delivered production credibility over funding momentum: Cornelis's DOE/national-lab base with a shipped CN5000 (signal f8fcdfab-f686-452c-9774-a92d1657a7a4) and Meta's 24,576-GPU production RoCE fabric (signal 88ae9cf9-df49-4170-9d28-05c55cd8300c) are real references, whereas the funded-but-pre-revenue silicon cohort is exposed to an 18–24 month design-win cycle that headline raises obscure (signal a5b5759e-da08-4f38-84aa-785a0664ab97). Net: bet on shipped endpoints and named clusters; discount spec press releases.