{"company":{"slug":"ayar-labs","name":"Ayar Labs","legal_name":"Ayar Labs, Inc.","aliases":["Ayar Labs"],"primary_layer":"L3","primary_topic_id":"infiniband-ethernet","secondary_topics":null,"hq_country":"US","hq_city":"Santa Clara","founded_year":2015,"is_public":false,"ticker":null,"description":"Optical I/O for chip-to-chip + scale-up. TeraPHY + SuperNova product line. Intel + AMD + GlobalFoundries strategic partners. Co-packaged optics alternative for scale-up vs Ethernet scale-out."},"profile":{"snapshot":"Optical I/O for chip-to-chip scale-up; Intel/AMD/GlobalFoundries-backed TeraPHY+SuperNova","stack_layer":"L3","why_join_top_2":["Photonics is the core, not adjacent tooling: 2 of 5 reqs in 90 days are silicon-photonics/optical-packaging (b538223b 2026-03-03, 35429dda 2026-04-29) — you own TeraPHY/SuperNova silicon directly.","Distribution is named and real: Intel, AMD and GlobalFoundries are strategic partners, and the 2026-05-08 principal ASIC-verification req (eb74cf42) signals a part moving toward tape-out, not a research demo."],"peer_comparison":{"substitute":{"name":"Meta Platforms","delta":"Meta's Ultra-Ethernet scale-out fabric is the substitute Ayar must displace — Ethernet-everywhere makes co-packaged optics for scale-up optional, not required."},"direct_competitor":{"name":"Cornelis Networks","delta":"Both chase non-NVIDIA scale-up/HPC interconnect, but Cornelis ships electrical InfiniBand-class fabric while Ayar bets on optical I/O at the package."}},"self_quality_score":{"notes":"business_signals_180d was empty, so top_business_signals_90d is necessarily [] and evidence leans on dated hiring signals.","originality":7,"evidence_density":6,"anti_generic_pass":true,"reverse_hype_present":true},"strategic_position":{"top_risk":"Zero business signals in the 180-day window: if no production design-win or revenue with Intel/AMD is announced by Q4 2026, the strategic partnerships remain pre-revenue and the 2026-04-11 Ethernet/InfiniBand sales hire (b65f1fde) reads as a pivot hedge.","their_bet":"Scale-up interconnect goes co-packaged-optical rather than Ethernet scale-out; the 2026-05-08 principal ASIC-verification hire (eb74cf42) signals a product pushing toward productization/tape-out with Intel/AMD/GlobalFoundries.","what_they_do_best":"Optical I/O silicon (TeraPHY transceiver + SuperNova laser) for chip-to-chip scale-up, evidenced by 2 of 5 recent reqs being silicon-photonics/optical-packaging (signals b538223b 2026-03-03, 35429dda 2026-04-29)."},"top_business_signals_90d":[],"top_hiring_specialties_60d":[{"job_count":2,"specialty":"Silicon photonics / optical packaging"},{"job_count":1,"specialty":"SerDes & high-speed signaling"},{"job_count":1,"specialty":"ASIC verification / interconnect protocols"}]},"avg_fit_score":68.96340240641713,"fit_scores":[{"overall_score":73.7058823529412,"growth_score":68,"comp_score":null,"learning_score":85,"stability_score":55,"culture_score":55,"jobseeker_profile_id":"ffe9a03e-5b9a-4f0d-b945-3bf8a263e6a4"},{"overall_score":70.1875,"growth_score":65,"comp_score":null,"learning_score":85,"stability_score":55,"culture_score":58,"jobseeker_profile_id":"6a34a657-002e-427c-99ec-e765ae9869ad"},{"overall_score":71.6875,"growth_score":70,"comp_score":null,"learning_score":82,"stability_score":52,"culture_score":55,"jobseeker_profile_id":"8c8d2974-3f3c-4c8b-bdb8-5dfef850c0de"},{"overall_score":60.2727272727273,"growth_score":58,"comp_score":null,"learning_score":84,"stability_score":52,"culture_score":55,"jobseeker_profile_id":"5f251125-ca59-45f0-9dac-10d0af8fdff2"}],"recent_business_signals":[],"recent_talent_signals":[{"job_title":"Principal ASIC Verification Engineer","job_level":"principal","job_specialty":["ASIC verification","interconnect protocols"],"posted_date":"2026-05-08"},{"job_title":"Optical Packaging Engineer","job_level":"mid","job_specialty":["photonic packaging","fiber attach"],"posted_date":"2026-04-29"},{"job_title":"Networking Solutions Architect","job_level":"senior","job_specialty":["Ethernet fabrics","InfiniBand","scale-out networking"],"posted_date":"2026-04-11"},{"job_title":"Senior Silicon Photonics Design Engineer","job_level":"senior","job_specialty":["silicon photonics","optical interconnect"],"posted_date":"2026-03-03"},{"job_title":"Staff SerDes / High-Speed Link Architect","job_level":"staff","job_specialty":["SerDes design","high-speed signaling"],"posted_date":"2026-02-24"}],"citation_url":"/companies/ayar-labs","last_updated":"2026-05-14T14:33:37.941141+00:00","generated_at":"2026-05-19T12:02:12.305Z"}